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Re: Socketed 750 CPU's
In message Fri, 9 Dec 1994 13:55:49 -0800 (PST),
Randal Whittle <whittle@chaph.usc.edu> writes:
>> The TP 750's use the Intel 486SL chip which *does* have a math-co
>> and operates at low power.
>>
>> The other IBM chip, the 486SLC has *no* math-co, but also happens
>> to have a 16K on-chip cache.
>
> Just as a follow-up, I think one or both of the models 500 and 720
> used the IBM SLC chip. Anyone?
Let's see if I can kill all these birds with one post.
IBM 486SLC: used in the TP500, 700, and 720. Comes in "normal" and
clock-doubled versions. The 500 and 720 use the clock doubled versions.
24-bit memory bus (16MB max), 16-bit data bus, 32-bit internal, no FPU,
16k cache.
IBM 486BL: aka "Blue Lightning." Used in the TP510 and maybe the TP425.
Comes in "normal" and clock-doubled/tripled versions. 32-bit memory bus
(4GB max), 32-bit data bus, 32-bit internal, no FPU, 16k cache. Before you
ask, the TP425 is like a TP350, only it's sold at schools.
Intel 486SL: discontinued, used in the TP750, only came in 25MHz and 33MHz
flavors. 32-bit memory bus, 32-bit data bus, 32-bit internal, with FPU
(except a version used in the TP350), 8k cache, on-board power management
and motherboard features.
Intel 486DX, DX2: The standard, used in TP755 and TP360 (? SX version).
32-bit memory bus, 32-bit data bus, 32-bit internal, with FPU, 8k cache.
Intel 486DX4: Clock tripled, 32-bit memory bus, 32-bit data bus, 32-bit
internal, with FPU, _16k_ cache. Costs more than a TP500. :-) TP755 only.
> ________________________________ Randy Whittle whittle@usc.edu
> | Y'know, Tuna just | USC School of Business (Fight on, 'SC
> | doesn't taste the same | (My opinions are mine, but
> | since they took the | right, they should
> | Dolphin out! |
> --------------------------------
You should try Dolphin sometime. Real good tasting. (The fish of course,
Mahi Mahi :-)
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