Re: 16 v 32 on TP

[bstewart@sun2.bnl.gov (Bruce Stewart)]

My understanding is that the relation between L2 cache size and
maximum efficiently usable RAM applies to non-EDO memory only.
As I recall, 256K cache are needed for each 16 MB.

For EDO memory, there is no such restriction.

Of course there may be other considerations. For example, I have
heard of cases where memory above 16MB was unusable because a
certain Trident video card reserved addresses around 16MB.
(And according to the ancients, no one would ever need more
than 64KB.)

-Bruce