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RE: 16 v 32 on TP



No...No ..No ...grin.
EDO is simply Extended Data Out page mode memory. A cache can NOT
tell what what type of memory is out there. With current caching architecture
it is the size of the TAG ram that detemines what amount of main memory 
will be cached. With EDO the performance hit on cache miss is 
simply less.
Since were talking about a TP and a 701 at that, this is all irrelevant.
As for Trident video cards....
..peter..

----------
From: 	Bruce Stewart[SMTP:bstewart@sun2.bnl.gov]
Sent: 	Wednesday, March 19, 1997 12:40 PM
To: 	ross@math.hawaii.edu; rwhittle@usa.net
Cc: 	thinkpad@cs.utk.edu
Subject: 	Re: 16 v 32 on TP

My understanding is that the relation between L2 cache size and
maximum efficiently usable RAM applies to non-EDO memory only.
As I recall, 256K cache are needed for each 16 MB.

For EDO memory, there is no such restriction.

Of course there may be other considerations. For example, I have
heard of cases where memory above 16MB was unusable because a
certain Trident video card reserved addresses around 16MB.
(And according to the ancients, no one would ever need more
than 64KB.)

-Bruce