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The Technical Reference for the TP600 (600tech.pdf) contains the following paragraph: Cacheable Address Space Cacheable address space is defined as system memory that resides on the system board (0 640 KB and 1 MB 256 MB). Cacheability of system memory is up to 64 MB for Pentium or 512 MB for Pentium II in the L2 cache. Nothing in address range hex A0000 BFFFF, I/O address space, or memory in any AT slot is cached. As far as I know, upgrading RAM beyond the cacheability limit severely impairs system performance. There are reports that system performance decreases by about 40% (in this case: PII, upgrade from 512MB to 640MB). Am I right that there is no point in using more than 64MB RAM in the MMX model? If so, this should also be true for the TP560 - which takes up to 96MB. Any comments? Regards Christoph Eyrich eyrich@zedat.fu-berlin.de