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Re: TP 600 (560?) - cacheable RAM?
I've got a 770 with a Pentium MMX 233 and 96MB. It doesn't seem to be
impaired at all. I didn't use it with the original 64MB configuration very
long, and when I did it was with Win95 (I quickly changed to NT4), so there's
no basis for comparison. Maybe I'll take out one of the 32MB chips for a day
and check it out.
I'd be interested in hearing from other people on this issue...
Later,
Rob
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Rob Bell
Senior Consultant, CPD Professional
CSC Consulting, Minneapolis, MN
rob_bell 'at' csi 'period' com
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Christoph Eyrich wrote:
> The Technical Reference for the TP600 (600tech.pdf) contains the
> following paragraph:
>
> Cacheable Address Space Cacheable address space is defined as system
> memory that resides on the system board (0 640 KB and 1 MB 256 MB).
> Cacheability of system memory is up to 64 MB for Pentium or 512 MB for
> Pentium II in the L2 cache. Nothing in address range hex A0000 BFFFF, I/O
> address space, or memory in any AT slot is cached.
>
> As far as I know, upgrading RAM beyond the cacheability limit severely
> impairs system performance. There are reports that system performance
> decreases by about 40% (in this case: PII, upgrade from 512MB to 640MB).
>
> Am I right that there is no point in using more than 64MB RAM in the
> MMX model? If so, this should also be true for the TP560 - which takes
> up to 96MB.
>
> Any comments?
>
> Regards
>
> Christoph Eyrich
>
> eyrich@zedat.fu-berlin.de